The Two-stage or Miller OTA
Verification
Christian Enz
Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland

Schematic of the Miller OTA.
This notebook presents the verification of the two-stage or Miller OTA shown in the above figure and designed in the Design Notebook. In this Notebook, we will first load the process parameters and the specifications. We then will load the bias and the transistors information resulting from the design process to evaluate the theoretical open-loop transfer function to compare it to the simulation results.
We can plot the magnitude and phase of the open-loop gain.
We now can estimate the input-referred noise PSD.
We can plot the input-reffered noise
The variance of the input-referred offset is given by \begin{equation*} \sigma_{V_{os}}^2 = \sigma_{VT1}^2 + \left(\frac{G_{m3}}{G_{m1}}\right)^2 \cdot \sigma_{VT3}^2 + \left(\frac{I_{b1}}{G_{m1}}\right)^2 \cdot \left(\sigma_{\beta 1}^2 + \sigma_{\beta 3}^2\right) \end{equation*} where \begin{align*} \sigma_{VT1}^2 &= \frac{A_{VTn}^2}{W_1 L_1},\\ \sigma_{\beta 1}^2 &= \frac{A_{\beta n}^2}{W_1 L_1},\\ \sigma_{VT3}^2 &= \frac{A_{VTp}^2}{W_3 L_3},\\ \sigma_{\beta 3}^2 &= \frac{A_{\beta p}^2}{W_3 L_3},\\ \end{align*}
We see that the random part of the input-referred offset voltage is dominated by the contribution of the differential pair.
The total power consumption (without the current sources) is given by
We can compare the current and power consumption of the Miller OTA to the telescopic OTA
The current and power consumption of the Miller OTA is 4.5 times larger than that of the telescopic OTA for the same specifications and performance.
We first write the parameter file for this specific design for running the Smash simulations.
To start we need to check the quiescent voltages and currents and the operating points of all transistors by running a .OP simulation.
We can check the operating point information looking the .op file.
Looking at the .op file, we see that, as expected, the quiescent output voltage $V_{outq}$
It is too high pushing M2 out of saturation.
We can extract the differential input voltage that needs to be applied at the input to bring the output in the high gain region setting it for example at the input common-mode $V_{ic}=0.9\,V$. This can be done by connecting the OTA in a voltage follower mode. The input-referred offset voltage can be extracted from the closed-loop voltage follower circuit as \begin{equation*} V_{os} = V_{in} - \left(1+\frac{1}{A}\right) \cdot V_{out} \cong V_{in} - V_{out} \quad \textsf{for $A \gg 1$}, \end{equation*} where $A \triangleq A_{open\textsf{-}loop}(0)$ is the open-loop DC gain which can be assumed to be much larger than 1. This means that, provided the DC open-loop gain is sufficiently large, the offset voltage can be measured at the amplifier differential input after imposing the proper input common-mode voltage $V_{ic}$.
We can now simulate the OTA in closed-loop as a voltage follower.
Let's have a look at the operating point information.
We see that now all the transistors are biased in saturation and that the quiescent output voltage $V_{outq}$ is very close to the input common-mode voltage.
The difference is actually the offset voltage $V_{os}$.
We can now apply this offset voltage to the open-loop circuit and check the operating point.
We see that now all the transistors are biased in saturation and that the quiescent output voltage $V_{outq}$ is close to the input common-mode voltage.
In order to simulate the small-signal diferential open-loop gain we first need to check the differential transfer characteristic in order to find the eventual offset voltage that needs to be added to make sure the output voltage is set at the common-mode voltage.
We can zoom into the high gain region to extract a more accurate value of the offset voltage that is needed to bring the output voltage back to the input common-mode voltage $V_{ic}$.
Having extracted a more accurate value of the offset voltage, we save it for further AC simulation.
In Smash it is unfortunately not possible to export the complex value of the closed-loop gain in batch mode simulation. We can verify this approach using the Smash interface.
Having extracted the offset voltage to make sure that the output voltage is close to the input common-mode voltage, we can now simulate the open-loop gain.
We can observe a very good match between the small-signal simulations and the theoretical results of the $GBW$. The DC gain obtained from the simulations is significantly larger than that obtained from the theoretical estimation. This is due to the simplistic model of the output conductance. However it is not a problem since the simulated gain is larger than the specifications. The phase margin spec is slightly lower than the specs.
The DC gain could be decreased by reducing the length of transistors M1a-M1b, M2, M4a-M4b and M5a-M5b. This will also reduce the transistors area and parasitic capacitances and therefore increase the phase margin.
We can compare the theoretical input-referred noise to that obtained from simulations.
We can observe an excellent match between the noise simulations and the theoretical results except at frequencies above the $GBW$. This is simply due to the fact that the noise coming from M4a-M4b, M2 and M5a-M5b was referred to the input by simply dividing by the square of the DC gain instead of the square magnitude of the frequency-dependent gain.
We can analyze the individual contributions of the various transistors.
The standard deviation of the random input-referred offset voltage can be simulated in Smash using Monte-Carlo (MC) simulation with 1000 runs. Note that the matching parameters have to be converted to dispersion parameters according to \begin{align*} SIGMAV &= \frac{A_{VT}}{\sqrt{2}},\\ SIGMAI &= \frac{A_{\beta}}{\sqrt{2}}. \end{align*} for both NMOS and pMOS.

MC simulation of the open-loop transfer characteristic for extracting the offset voltage.
The offset voltage is first extracted from the open-loop circuit as shown in the above figure. The results of the MC simulation is $\sigma_{Vos} = 4.08\,mV$ which is consistent with the dispersion simulation $\sigma_{Vos} = 4.1\,mV$ provided by Smash and close to the theoretical estimations $\sigma_{Vos} = 4\,mV$.

MC simulation using a closed-loop configuration for extracting the offset voltage.
For high gain amplifiers, it is also possible to measure the offset by putting the OPAMP in a closed loop as shown in the above figure. The results of the MC simulation is $\sigma_{Vos} = 4.07\,mV$ which is consistent with the dispersion simulation $\sigma_{Vos} = 4.1\,mV$ provided by Smash and close to the theoretical estimations $\sigma_{Vos} = 4\,mV$.

MC closed-loop simulation of the contributions of the differential pair and the current mirror to the input-referred offset.
The contributions of the various transistors to the input-referred offset is shown in the above figure. It confirms that the differential is the dominant contributor to the offset voltage.
The total power consumption is given by
We can compare the current and power consumption of the Miller OTA to the telescopic OTAb
The current and power consumption of the Miller OTA is 1.36 times larger than that of the telescopic OTA for the same specifications and performance.
The theoretical results can also be compared with results obtained from simulations performed with ngspice. The cells below will run the simulations with ngspice. In order to run the simulations you need to have ngspice installed. Please refer to the moodel site for full instructions.
We first write the parameter file for this specific design for running the ngspice simulations.
To start we need to check the quiescent voltages and currents and the operating points of all transistors by running a .OP simulation.
The voltages at the various circuit nodes are given below.
The output voltage is almost saturated to $V_{DD}$, pushing M2 out of saturation.
We can extract the differential input voltage that needs to be applied at the input to bring the output in the high gain region setting it for example at the input common-mode $V_{ic}=0.9\,V$. This can be done by connecting the OTA in a voltage follower mode. The input-referred offset voltage can be extracted from the closed-loop voltage follower circuit as \begin{equation*} V_{os} = V_{in} - \left(1+\frac{1}{A}\right) \cdot V_{out} \cong V_{in} - V_{out} \quad \textsf{for $A \gg 1$}, \end{equation*} where $A \triangleq A_{open\textsf{-}loop}(0)$ is the open-loop DC gain which can be assumed to be much larger than 1. This means that, provided the DC open-loop gain is sufficiently large, the offset voltage can be measured at the amplifier differential input after imposing the proper input common-mode voltage $V_{ic}$.
We can now simulate the OTA in closed-loop as a voltage follower.
We see that now the ouput voltage is very close to the input voltage that has been set to $V_{ic}$. We can then extract the corresponding offset voltage $V_{os} \cong V_{in} - V_{out}$
We can now apply this offset voltage to the open-loop operating point point simulation.
The quiescent output voltage is now in the high gain region.
The operating point information for all transistors can be extracted from the .op file.
We can check the bias voltages and operating region of each transistor below.
All transistors are biased in saturation. The operating points looks fine. We can now proceed with the simulation of the open-loop large-signal transfer characteristic.
We now simulate the DC differential transfer characteristic. We can then check the systematic offset voltage that was extracted above.
The large-signal transfer characteristic shows a very sharp transition around $V_{id}=0$. We can now zoom into the high gain region and extract a more accurate value of the offset voltage.
We can now save the extracted offset voltage value for further AC simulation.
Simulating the open-loop gain for high gain amplifiers is not easy to perform without closing the loop. There are basically two approaches to simulate the open-loop gain for high-gain amplifiers: 1) Imposing a DC offset voltage to the amplifier in open-loop configuration that brings the output voltage back to normal (for example equal to the input common-mode voltage) or 2) Simulating the closed-loop gain (for example in voltage follower mode with a feedback gain of 1) and extracting the open-loop gain from the closed loop gain according to \begin{equation*} A_{open\textsf{-}loop}(\omega)= \frac{A_{closed\textsf{-}loop}(\omega)}{1 - A_{closed\textsf{-}loop}(\omega)}, \end{equation*} where $A_{closed\textsf{-}loop}(\omega)$ is the simulated closed-loop transfer function and $A_{open\textsf{-}loop}(\omega)$, the computed open-loop transfer function. The above relation assumes that the open-loop DC gain is large enough for the input-referred offset voltage to be ignored.
The input-referred offset voltage can be extracted from the closed-loop voltage follower circuit as \begin{equation*} V_{os} = V_{in} - \left(1+\frac{1}{A}\right) \cdot V_{out} \cong V_{in} - V_{out} \quad \textsf{for $A \gg 1$}, \end{equation*} where $A \triangleq A_{open\textsf{-}loop}(0)$ is the open-loop DC gain which can be assumed to be much larger than 1. This means that, provided the DC open-loop gain is sufficiently large, the offset voltage can be measured at the amplifier differential input after imposing the proper input common-mode voltage $V_{ic}$.
We can now simulate the OTA in closed-loop as a voltage follower. Note that we need to have a sufficient number of digits for the simulated closed-loop gain because the later is very close to 1.
With this technique, the DC gain is much underestimated. This might be due to the fairly large offset voltage.
After having checked the operating point information, extracted the offset voltage and making sure that the OTA output is not saturated, we can now proceed with the open-loop gain simulation.
We can observe a very good match between the small-signal simulations and the theoretical results of the $GBW$. The DC gain obtained from the simulations is significantly larger than that obtained from the theoretical estimation. This is however not a problem since the simulated gain is larger than the specifications.
We can compare the theoretical input-referred noise to that obtained from simulations.
We observe an almost perfect match between the predicted and simulated input-referred noise which is completely dominated by the flicker noise contribution.
The total power consumption (without accounting for the currents flowing through M3a and M5a) is given by
We can compare the current and power consumption of the Miller OTA to the telescopic OTA.
The current and power consumption of the Miller OTA is 4.5 times larger than that of the telescopic OTA for the same specifications and performance.
This Notebook presented the verification of the design by simulation with Smash and ngspice. The specifications are achieved at the cost of a much larger power consumption than the symmetrical OTA for the same specification on the DC gain.